Recap of the 2016 DATE Conference Exhibition

Recap of DATE 201

Conference Reports: Recap of DATE 2019 in Florence, Italy

The Design, Automation, and Test in Europe (DATE) 2019 Conference and Exhibition attracted more than 1600 registrations from over 40 countries and concluded with excellent feedback from both participants and exhibitors. DATE combines the world\u2019s favorite electronic systems design and test conference with an international exhibition for electronic design, automation, and test from system-level hardware and software implementation right down to integrated circuit design. This year, the conference was held in Florence, Italy, for the first time. The 22nd edition of DATE took place at the Firenze Fiera from 25 to 29 March 2019

Evolutionary algorithm based exploration of software schedules for digital signal processors

The simultaneous exploration of tradeo s between program memory, data memory and execution time requirements (3D) for DSP (digital signal processing) algorithms in embedded computing environments is a demanding application and example par excellence of a multi-objective optimization problem. In order to solve this problem, two evolutionary algorithms are shown to be successfully applicable for exploring Pareto-optimal solutions. For di erent well-known target DSP processors, the trade-o fronts are analyzed. The two approaches are quantitatively compared.

Simulative buffer analysis of local image processing algorithms described by windowed synchronous data flow

{ haubelt,teich} @ cs.fau.de Abstract- Embedded real-time image processing applications working on large images have to process and store huge amounts of data. Consequently the organization of the memory buffers and the precise determination of the required buffer sizes are critical steps for efficient system implementation. In this paper, we propose a new method, that permits the analysis to be performed automatically for local image processing algorithms. The latter ones are specified by help of the Windowed Synchronous Data Flow (WSDF) model, a multi-dimensional model of computation which has been especially designed to represent local image processing algorithms. This paper introduces a corresponding buffer organization leading to solutions comparable to hand-built designs concerning the required memory. Special care is taken, so that also large problems in terms of the image size can be analyzed. The applicability of our approach is demonstrated by help of a JPEG2000 decoder model